Conventionally, higher capacity of a two-dimensional semiconductor memory device has been realized by downscaling the circuit. However, because downscaling technology is approaching a limit, a three-dimensional semiconductor memory device is being developed to realize even higher capacity. In the three-dimensional semiconductor memory device, a stacked body in which multiple electrode films are stacked is provided on a substrate; multiple semiconductor members that pierce the stacked body are provided; and memory cell transistors are formed at the crossing portions between the electrode films and the semiconductor members. The stability of the operations of the memory cell transistors is problematic in such a three-dimensional semiconductor memory device.